Hello there,
I am an Electrical Engineer by profession specialist in verilog/VHDL related FPGA tasks. I have been working on verilog/VHDL on different freelancing platforms for over 5+ years. My recent project was to implement 3-bit Arithmetic Logic Unit using VHDL simulated on Quartus. I have strong grip on Modelsim,Xilinx, Vivado & Quartus. I have seen your task details and i am pretty sure i can do this task in an effecient manner.
If you have any questions you can ask me.
Looking forward to hearing from you
Regards,
Waqar Shahzad