Verilog Code Programmer

Hi There, I am a senior Ph.D. Level Expert and Have more than 5 years of experience in electronics and embedded design. I have experience in verilog/vhdl coding and can implement this project if you share more details. Just check my profile and share your details. Time and Budget will be discussed. Thanks

Hi I am hardware design engineer using HDL. I have experience in simulation, synthesize and implementation for verilog/VHDL HDL Design . I can do the above mentioned work for your digital systems Kindly share your details on chat Thank you

Hello, I have been working with Verilog based digital designing including interfacing with peripherals. I believe I can deliver your work with high quality. Looking forward to your positive response. Best regards.

HI, I have more than 11 years of professional experience in ASIC/FPGA Design and Verification. - RTL development using Verilog/VHDL/SpinalHDL, knowledge of SERDES, AXI4 based FPGA logic design, Formal Verification, Assertions. - RTL development of USB2.0 Soft PHY IP. - RTL development of USB2.0 to Peripherals (I2S, SPI, I2C, UART) - Development of Systemverilog/UVM environment from scratch. - Verification architecture development and testplan writing. - Implementation of reusable Universal Verification Components (UVC) and VIP. - Debugging simulation and regression failures. - Code coverage and Functional coverage analysis and closure. - MIPI, C-PHY, D-PHY, USB2.0, DDR2, AXI4, AXI4 Stream protocols. - FW Tests implementation in C to verify processor based subsystems. - Translating C++ Model of VESA DSC (Display Stream Compression) Decoder into RTL logic design using SpinalHDL/Verilog. - UVM RAL (Register Abstraction Layer) implementation and integration. Thanks, Kartik

Dear Sabyasachi D., How is it going well? We would like to grab this opportunity and will work till you get 100% satisfied with our work. We are an expert team which have many years of experience on Electronics, Verilog / VHDL Lets connect in chat so that We discuss further. Regards

Hi. I have expertise in Verilog and VHDL Programming, I have coded various FPGA's like Spartan, Virtex and SoC type.I also have deep understanding in using Xilinx ISE and Vivado. We can discuss regarding this. Thank You.

I already have the code which aims to design a push-button door lock using a standard telephone keypad as input, implemented in Verilog. Objectives: The main objectives of this proposal are as follows: 1) Design a push-button door lock using a standard telephone keypad as input in Verilog. 2) Implement the push-button door lock design on a programmable logic device (PLD) or a field-programmable gate array (FPGA) for hardware testing. 3) Develop a Verilog code that can detect valid keypad inputs and trigger appropriate actions, such as unlocking the door, based on the entered code. 4) Ensure that the push-button door lock design is secure and reliable, providing effective protection against unauthorized access. 5) Test the functionality of the push-button door lock design using Verilog simulation and hardware testing on an appropriate platform. Methodology: The proposed push-button door lock design will be implemented using Verilog HDL. The design will comprise of a standard telephone keypad, which typically consists of 12 keys (0-9, *, and #), and a hardware module that can detect valid keypad inputs and control the lock mechanism accordingly. You can contact with me for further information.

Hello there, I have seen your post, I am experienced digital IC design engineer, and I believe I can help you with your project. Contact me for further details. Have a great day

I am PhD student in Computer Engineering.I have studied Digital System Design,Advance Digital System Design and Hardware Design for DSPs.I have done lot of code in verilog in Vivado 2018.I want to do this project.

I have years of experience with Verilog coding. I may be able to help you solve your problem. Can you describe your requirement in more detail?