VHDL Circuit Modelling and Simulation in Intel’s Quartus Prime software

OUTCOMES ASSESSED

 The ability to extract and critically evaluate data for an unfamiliar digital design

problem.

 The application of appropriate design methods to the VHDL design.

 The selection appropriate analysis tools, VHDL model abstraction levels and simulation

test vectors.

 Ability to implement your design solution on a commercially available digital Computer

Aided Design (CAD) tool.

 Critically evaluate and test the developed solution, reporting results in an appropriate

form.

Electrical Engineering Electronics Engineering Verilog / VHDL

Project ID: #18049845

About the project