Creating a 32 bit MIPS 2 Processor - open to bidding

Hi, VHDL and Verilog HDL expert here with 13+ and 15+ years experience. I have designed various RISC, CISC and ASIP designs during these last 10 years or so. I can design the VHDL model for the MIPS processor using a single entity and architecture. Also will provide self-checking testbench using file I/O facilities.

I have enough expertise in designing and implementing hardware modules. We can work hour-based (20$/hours) instead of project based payment, but I won't charge more than 400$ in both cases.

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Hello & Greetings, I work for the High Performance Computing Lab at IIT Bombay. I am an expert with VHDL, Verilog, FPGAs and various aspects of VLSI Design. I can do this project for you with great professionalism and efficiency. The code will be robust, complete, well tested and follow best practices. Looking forward, Regards, JP

Hi. EE with 3 years experience in digital system designing on FPGAs. I have worked on similiar project earlier. But I can work in verilog only. If you want I can send you the project report along with the code of that previous project if you are interested. regards, Hammad (Waqas' partner)

Experience (9+yrs):  9+ years of work experience in high speed FPGA based Digital Logic Design and Development using VHDL.  Implementation and debugging in various device families FPGA.  Functional and Timing verification using MODELSIM.  Implementation and onboard debugging using ALTERA and XILINX tools.  6 months of onsite experience in Sweden. Technical Skills:  Expertise in architectural implementation using Altera Quartus II and Xilinx ISE.  Expertise in FPGA selection, Resource Estimation, Pin Planning and Timing Closure etc.  Expertise in VHDL and exposure to Verilog.  Usages of DDR2 SDRAM Controller IP, Video IPs etc.  Verification experience using ModelSim, VCS and NC Sim.  Understanding of C, C++, Perl and Tcl.  Experience in Windows and Linux environments. I have done 80c51 core in vhdl earlier and hence thinks can do this comfortably well.

Hello. I am just getting back into freelancing again. A few questions: By one model only, do you mean it should simulate only one specific model's physical features such as size of cache, etc...? Or simply implement the MIPS instruction set? Also, are you planning on using any specific FPGA, or does it not matter? Thank you for your time and look forward to working with you.

Expert in Processor Design Implemented Reduced instruction set computer based machines during my industrial career