CPU Design with Support for External Interrupts

Code to be written with simple comments. Easy to follow and understand. The objective of this experiment is to design, simulate, and build a microcoded CPU capable of servicing external interrupt requests. Interrupts will be employed to initiate memory-mapped I/O. Firmware in the microcode will implement polling to determine the type of interrupt request. The CPU implementation should use the Altera DE2-70 Education Board. Onboard or additional push buttons should be used to initiate interrupts