Verilog / VHDL jobs

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Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

6 jobs found, pricing in SGD

LabVIEW Controls Program 6 days left

I work for a company that builds Air Cooled Heat Exchangers. We pressure test all of our units before they leave the plant to ensure they hold pressure without any leaks. To improve safety, we are going to a fully automated test system, which is to be controlled by a DAQ system using a Laptop. I am looking for someone to write me two separate (but very similar) LabView programs for both of the te...

$5295 (Avg Bid)

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23 bids

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aurdino project 5 days left

Build a robot connecting circuits and programming

Electrical Engineering Electronics Engineering Microcontroller Verilog / VHDL

$1432 (Avg Bid)

$1432 Avg Bid

27 bids

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H.264/H.265 decoder 4 days left

The project is to design a video decoder for H.264/265 in ASIC design Performance requirement 1080p30 x 8 channels

FPGA Verilog / VHDL

$6211 (Avg Bid)

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9 bids

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DMA controller for AXI4 3 days left

This project is to design a DMA engine for the AMBA4 system. The engine has one 512b AXI4 master and one 32b AXI4-lite configuration interface. The engine supports following DMA mode: • 1D mode: Single continuous block • 2D mode: multiple continuous blocks equally spaced. • 3D mode: multiple 2D block equally spaced. • Interleaving mode: read multiple blocks and send out interl...

Verilog / VHDL

$669 (Avg Bid)

$669 Avg Bid

11 bids

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RF telecommunication receiver system 2 days left

Design and simulate a typical RF Telecommunication receiver system IN SIMULINK/MATLAB/LABVIEW

Electrical Engineering Engineering LabVIEW Matlab and Mathematica Verilog / VHDL

$213 (Avg Bid)

$213 Avg Bid

32 bids

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Програмування ПЛІС VHDL/Verilog 3 days left

Науково-дослідний проект в галузі неруйнівного контролю. ____________________________________________________________ Scientific research project in the field of non-destructive testing.

Electrical Engineering Engineering FPGA Microcontroller Verilog / VHDL

$536 (Avg Bid)

$536 Avg Bid

3 bids

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