Verilog / VHDL Jobs

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Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

18 jobs found, pricing in SGD

Temperature control project on mcu MC9S08GB32 using code warrior 6 days left

Temperature control project on MC9S08GB32 using code warrior and i have previous year solved solution as well more details will be shared

$187 (Avg Bid)

$187 Avg Bid

8 bids

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ALU design in VHDL 6 days left

mini arithmetic logic unit for signed and unsigned numbers

FPGA Verilog / VHDL

$23 (Avg Bid)

$23 Avg Bid

6 bids

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Physical Design Engineer-Soc 6 days left

Looking for a Senior Physical Design Engineer in California only

Electronics FPGA Verilog / VHDL

$47743 (Avg Bid)

$47743 Avg Bid

1 bids

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Need Xilinx developer_8263 -- 2 6 days left

DESIGN OF NAND MEMORY CONTROLLER ARCHITECTURE FOR BIG DATA STORAGE

FPGA Verilog / VHDL Very-large-scale integration (VLSI)

$41 - $341

0 bids

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CODESYS Freelancer Needed to design Programmable Logic Controllers (PLC) 5 days left

I am looking for an engineer who has good knowledge of Codesys for Programmable Logic Controllers (PLC). The freelancer must have experience of doing technical writing as well. More details will be shared with the shortlisted freelancer.

Circuit Design Electrical Engineering Electronics Microcontroller Verilog / VHDL

$217 (Avg Bid)

$217 Avg Bid

4 bids

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Programmable Logic Controllers (PLC) using CODESYS 4 days left

Hello Everyone I am looking for an Engineer with sound knowledge of CODESYS for completion of project. More details will be shared with experienced and interested freelancers. The person must have sound knowledge of technical writing as well to handle the description part of the project. Kindly place your competitive bids for further discussion.

Electrical Engineering Microcontroller PCB Layout PLC & SCADA Verilog / VHDL

$125 (Avg Bid)

$125 Avg Bid

9 bids

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Microchip PIC microprocessor software to control LCD, Keypad, USB, RTC and RS-232 3 days left

Project Description: 2-Stage Project with 2 milestone payments. 1. The 1st stage is completion of the board design (must use Orcad/Cadence software), which includes schematic, printed circuit board and Bills Of Materials. 1st milestone payment on successful completion of 1st stage 2. The 2nd stage is coding the software with good documentation and 2nd milestone payment is made on successful c...

C Programming Electrical Engineering Electronics Microcontroller Verilog / VHDL

$870 (Avg Bid)

$870 Avg Bid

45 bids

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Restructuring and Code Conversion 2 days left

I need parse Verilog (vhdl) code for fpga, structure the same code and rewrite to another fpga. The project is ready.

Electronics FPGA Microcontroller Verilog / VHDL

$5215 (Avg Bid)

$5215 Avg Bid

17 bids

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ADC in FPGA 2 days left

Implementation of suitable RC filter for ADC. Digital part implementation is done on FPGA. RC filter has to be designed for given specification.

Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL

$30 (Avg Bid)

$30 Avg Bid

8 bids

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VHDL code of optimization algorithm fixing. -- 2 1 day left

VHDL code of optimization algorithm fixing.

Matlab and Mathematica Python Verilog / VHDL

$80 (Avg Bid)

$80 Avg Bid

9 bids

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implement a pipelined MIPS proccessor simulator in C++ -- 2 1 day left

Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

Assembly C Programming C++ Programming Software Architecture Verilog / VHDL

$228 (Avg Bid)

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3 bids

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implement a pipelined MIPS proccessor simulator in C++ ... 11 hours left

Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

Assembly C Programming C++ Programming Software Architecture Verilog / VHDL

$36 (Avg Bid)

$36 Avg Bid

2 bids

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1 hour design antenna by CST program 10 hours left

i want to design step by step antenna by CST program (spiral antenna) by TeamViewer you will describe to me how to design it

Circuit Design Electrical Engineering Electronics Engineering Verilog / VHDL

$164 (Avg Bid)

$164 Avg Bid

14 bids

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implement a pipelined MIPS proccessor simulator in C++ 9 hours left

Hi I am looking to hire some expert to implement a pipelined MIPS proccessor simulator in C++ .I will review your bid later so feel free to drop your bid here. The maximum I can offer is 35 CAD !!

Assembly C Programming C++ Programming Software Architecture Verilog / VHDL

$230 (Avg Bid)

$230 Avg Bid

3 bids

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implement a pipelined MIPS proccessor simulator in C++ Expert 8 hours left

Hello Please check it carefully. /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ......................................................... [login to view URL] have a look here, at the moment I need only labaa 3. maybe you have to download the files because ...

Assembly C Programming C++ Programming Software Architecture Verilog / VHDL

$31 (Avg Bid)

$31 Avg Bid

2 bids

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DVLSI project 'ASIC design of face detection using haar wavelet'. 2 hours left

DVLSI project 'ASIC design of face detection using haar wavelet'. Use verilog, FPGA and Viola Jones algorithm

Engineering FPGA Verilog / VHDL

$407 (Avg Bid)

$407 Avg Bid

2 bids

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Private project or contest #21362369 16 days left

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Digital Electronics Electronics FPGA Programming Software Architecture Software Development Software Testing Telecommunications Engineering Verilog / VHDL Video Processing

Sealed NDA

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VHDL Verilog 5 days left

Kann mir jemand helfen dieses Verilog Problem zu lösen?

Verilog / VHDL

$52 (Avg Bid)

$52 Avg Bid

2 bids

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