Verilog / VHDL Jobs

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About Verilog / VHDL
Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    17 jobs found, pricing in SGD
    multi level parking system by using VERILOG in Xilinks and Nexys2 FPGA -- 3 6 days left

    The parking system has 4 levels, level 1 for admins and disabled, level 2 for staff and disabled, level 3 for visitors and disabled, level 4 for visitors.. we two gates in each level (the gate is a pair of IR sensor) , one gate for entrance and the other for exit.. moreover we have camera and monitor near the entrance gate of level 1 , the camera detects the type of car that entering the parking a...

    Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL
    $159 (Avg Bid)
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    2 bids
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    VLSI CMOS simple project urgent $50 -- 2 6 days left

    hi ineed vlsi cmos expert asap

    Circuit Design Digital Design Electrical Engineering Electronics Verilog / VHDL
    $56 (Avg Bid)
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    1 bids
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    VHDL FPGA GAME IMPLEMENTATION 6 days left

    VHDL implemented in altera de2 board

    Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL
    $686 (Avg Bid)
    $686 Avg Bid
    1 bids
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    QUARTUS II (ALTERA DE2 - FPGA VHDL) 6 days left

    Our group wants to implement a game using altera de2 cyclone ii board. Please see the attached file for the details of the game to be implemented.

    Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL
    $14 (Avg Bid)
    $14 Avg Bid
    1 bids
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    write vhdl code for a simple basic processor with control unit 6 days left

    A very simple processor is designed, need to write vhdl codes(few components already written) for it and implement the microprogrammed Control unit.

    Electronics FPGA Microcontroller Verilog / VHDL
    $34 (Avg Bid)
    $34 Avg Bid
    4 bids
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    FPGA, VDHL coding 5 days left
    VERIFIED

    Please contact me if you expert In FPGA, VDHL coding

    Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL
    $231 (Avg Bid)
    $231 Avg Bid
    9 bids
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    I need a microcontroller developer 5 days left

    The project has a few basic functions. 1. maintain a specific temperature 2. fire a signal to a solenoid valve in particular (adjustable) intervals. other basic functions like on off etc

    Arduino Electrical Engineering Electronics Microcontroller Verilog / VHDL
    $258 (Avg Bid)
    $258 Avg Bid
    37 bids
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    Verilog simulation of two action-reaction processes 5 days left
    VERIFIED

    Verilog simulation of two action-reaction processes

    Digital Design Electrical Engineering Electronic Design Mathematics Verilog / VHDL
    $43 (Avg Bid)
    $43 Avg Bid
    3 bids
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    multi level parking system by using VERILOG in Xilinks and Nexys2 FPGA 4 days left

    The parking system has 4 levels, level 1 for admins and disabled, level 2 for staff and disabled, level 3 for visitors and disabled, level 4 for visitors.. we two gates in each level (the gate is a pair of IR sensor) , one gate for entrance and the other for exit.. moreover we have camera and monitor near the entrance gate of level 1 , the camera detects the type of car that entering the parking a...

    Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL
    $211 (Avg Bid)
    $211 Avg Bid
    7 bids
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    adc data decoding module 4 days left

    Design adc data decoding module. (vivado 2018.2) Input: FCLK,DCLK,DATA_0~DATA_15.(all input signals are LVDS) Output: CLKOUT, DOUT_0 [15:0] ~ DOUT_31 [15:0]. One data path contains two adc signals. The two adc signals are distinguished by FCLK level. I need to decode the adc data into 16-bit wide data and output a total of 32 channels of adc data. The input waveform is shown in the figure. The dif...

    Electronics FPGA Microcontroller Verilog / VHDL
    $294 (Avg Bid)
    $294 Avg Bid
    7 bids
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    Anyone expert in vhdl 4 days left

    Vhdl is needed

    Verilog / VHDL
    $36 (Avg Bid)
    $36 Avg Bid
    5 bids
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    FPGA peogramming, Xillinx 2 days left

    Need help program FPGA to communicate with TI7200 through SPI, and generate 300 and 100 Hz sine waves to drive two electric coils,

    Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL
    $697 (Avg Bid)
    $697 Avg Bid
    14 bids
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    Synthesize the controller fora very simple vending machine 21 hours left
    VERIFIED

    Use a Verilog and Do exactly what is on the paper and hand me a report with codes, synthesized diagrams, and a description comparing the different state assignments

    Electrical Engineering Electronics Engineering FPGA Verilog / VHDL
    $32 (Avg Bid)
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    6 bids
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    VHDL questions 16 hours left

    I have some VHDL questions which I nedd to be solved .

    Electrical Engineering Electronics Engineering FPGA Verilog / VHDL
    $25 (Avg Bid)
    $25 Avg Bid
    6 bids
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    FPGA Designing 13 hours left

    Hello, I need FPGA designing expert. I have complete details of the project. Place your bids, i will share the details with the best bidder. Thank you in advance

    Electrical Engineering Electronics FPGA Verilog / VHDL
    $73 (Avg Bid)
    $73 Avg Bid
    15 bids
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    Diseño FPGAs en VHDL 1 day left
    VERIFIED

    Proyecto enfocado al diseño VHDL sobre FPGAS. Desarrollo de código y de bancos de pruebas, verificación del funcionamiento y resolución de algunas cuestiones. Tiene que estar terminado para el día 17 de diciembre. Se adjunta toda la descripción de lo que hay que hacer, así como unas plantillas para las soluciones y algunos bancos de pruebas.

    Electrical Engineering Electronics FPGA PCB Layout Verilog / VHDL
    $45 (Avg Bid)
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    1 bids
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    Trophy icon VHDL Design 13 hours left

    Concurso enfocado al diseño VHDL sobre FPGAS. Desarrollo de código y de bancos de pruebas, verificación del funcionamiento y resolución de algunas cuestiones. El concurso comienza hoy y termina en 7 días. Los participantes tienen una semana para avanzar todo lo que puedan. El participante ganador dispondrá de 10 días más para finalizar ...

    Verilog / VHDL
    $47 (Avg Bid)
    $47
    1 entries
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