Verilog vhdl jobs

Filter

My recent searches
Filter by:
Budget
to
to
to
Type
Skills
Languages
    Job State
    3,269 verilog vhdl jobs found, pricing in SGD
    Verilog Easy Task 3 days left
    VERIFIED

    Verilog Easy Task needs to be done in next 36 hours

    $67 (Avg Bid)
    $67 Avg Bid
    11 bids

    The instruction set for the processor RISC-V should be expanded. Hardware implementation of RISC-V processor with pipeline is already done (There is 5 stages of pipeline: Fetch, Decode, Execute, Memory and WriteBack). VHDL files are in attachment. The task is to upgrade this processor with 20 new instructions. For each instructions there is possibility of appearance of the hazard. Every hazard mus...

    $404 (Avg Bid)
    $404 Avg Bid
    10 bids

    Need help with my VHDL Coding exercise

    $49 (Avg Bid)
    $49 Avg Bid
    7 bids

    We need a code in VHDL or Verilog for Sobel and Canny algorithms

    $40 (Avg Bid)
    $40 Avg Bid
    7 bids

    Expert must be experienced and familiar with Xilinx FPGA, Vivado, VHDL very well.  Below are the basic requirements are given. Any query/question is highly welcome.  Project Descriptions:   Long term full speed memory test for Xilinx FPGA DDR4@1200Mhz in VHDL.  Delivery on the KCU105 platform. Memory test designed to run for several days gathering memory errors s...

    $1060 (Avg Bid)
    $1060 Avg Bid
    11 bids

    Expert must be experienced and familiar with Xilinx FPGA, Vivado, VHDL very well.  Below are the basic requirements are given. Any queries/question is highly welcome.  Project Descriptions:   Long term full speed memory test for Xilinx FPGA DDR4@1200Mhz in VHDL.  Delivery on the KCU105 platform. Memory test designed to run for several days gathering memory errors ...

    $463 (Avg Bid)
    $463 Avg Bid
    7 bids
    Project for Asad S. 22 hours left

    Hello Can you write the code VHDL in quartus2 for me ?

    $14 (Avg Bid)
    $14 Avg Bid
    1 bids

    Hello Can you write the code VHDL in quartus2 for me ?

    $14 (Avg Bid)
    $14 Avg Bid
    1 bids

    Hello Can you write the code VHDL in quartus2 for me ?

    $14 (Avg Bid)
    $14 Avg Bid
    1 bids
    Project for Duc D. 22 hours left

    Can you write the code VHDL in quartus2 for me ?

    $14 (Avg Bid)
    $14 Avg Bid
    1 bids
    Project for Kaif L. 20 hours left

    Enter 8 number in 2' compliment then sorting number 8 number from min to max AND max to min. run this in quartus2 with VHDL or dedicate microprocessor in quartus 2 . Output this project I will send you later if you accept my work.

    $14 (Avg Bid)
    $14 Avg Bid
    1 bids

    We are looking for technical content writers to prepare DIY projects on various electronic topics. We design learning path's for students. Our website name is [login to view URL]

    $139 (Avg Bid)
    $139 Avg Bid
    8 bids

    I would like to implement using Verilog a circuit that simulates a single column 6-item drink machine where everything sells for $1.50. I would like to see a test bench to prove it as well! Cash only, no CCs. Nickels, dimes, quarters, half-dollars, dollars. Preferring not to pay more than $85 if possible!

    $217 (Avg Bid)
    $217 Avg Bid
    6 bids

    I would like to implement using Verilog a circuit that simulates a single column 6-item drink machine where everything sells for $1.50. I would like to see a test bench to prove it as well! Cash only, no CCs. Nickels, dimes, quarters, half-dollars, dollars.

    $60 (Avg Bid)
    $60 Avg Bid
    4 bids

    I need VHDL code that is to be created for a digital watch to be implemented on a 7 segment display FPGA board. I need someone to explain to me in detail what is going on in each step of the code, as well as a video of how they are implementing it on the board.

    $96 (Avg Bid)
    $96 Avg Bid
    2 bids

    Design RTL for hardware block cache controll. The controller manages the memory of 4-way associativity. The block size is 64 bits. The total memory capacity is 32 kB. It uses the LRU (Least Recently Used) rule when replacing a block. The block contains two interfaces with hand signals (ready and valid). Once a valid signal is raised, it must not be lowered until the appropriate ready signal is rec...

    $301 (Avg Bid)
    $301 Avg Bid
    5 bids

    Convert matlab / simulink simulation to vhdl for fpga. Requires conversion from floating point to fixed point.

    $7 / hr (Avg Bid)
    $7 / hr Avg Bid
    9 bids

    BCH (15,7) decoder in verilog HDL

    $18 / hr (Avg Bid)
    $18 / hr Avg Bid
    8 bids

    BCH (15,7) decoder in verilog HDL,

    $137 (Avg Bid)
    $137 Avg Bid
    7 bids

    Abstract The purpose of this project is to interface a GPS receiver into an FPGA board to capture the necessary location data and present it on an attached display and make it available to a remote computer via serial interface. It will involve learning about GPS receivers, location data communication format, FPGA programming using Verilog and building interesting embedded circuits. A GPS rece...

    $697 (Avg Bid)
    $697 Avg Bid
    1 bids

    Dear Zhengang, please find the job offer below, note that I’ll be also supporting you as I wish to understand the process, I mainly need the FPGA Verilog code Abstract The purpose of this project is to interface a GPS receiver into an FPGA board to capture the necessary location data and present it on an attached display and make it available to a remote computer via serial interface. I...

    $697 (Avg Bid)
    $697 Avg Bid
    1 bids

    FPGA-based accelerator for Deep Neural Networks Deep neural networks find many uses in pattern recognition applications. However, they are computationally expensive on standard computer architectures. The use of hardware acceleration is a promising approach to providing good performance. The aim of this project is to design a demonstrator for deep neural network implementation o...

    $1222 (Avg Bid)
    $1222 Avg Bid
    4 bids

    Hi, I would like to find someone who can search online for authentic and paid tech based projects in electrical engineering fields, like Matlab, Verilog based etc. All projects should ideally be simulation based. The ideal project would be between 1000-1500 £ and would need to have a deadline of at least 1 month. Your help is required to search for such projects on freelancing websites, b...

    $35 (Avg Bid)
    $35 Avg Bid
    9 bids

    i need code for 52 bit cla and 52 bit mutiplier the code must be only in Verilog and must be done in xilinx software pleae help to give the code as soon as poosible

    $17 (Avg Bid)
    $17 Avg Bid
    2 bids

    Easy VHDL Work needs to be done in next 15 hours.

    $14 (Avg Bid)
    $14 Avg Bid
    6 bids

    I want long term employee. altera quartus II is needed. its simple project

    $15 / hr (Avg Bid)
    $15 / hr Avg Bid
    7 bids

    I have no experience using VHDL. I would appreciate if the design and simulation could be explained to me upon creation. I need to create a "Digital Watch" circuit according to specific guidelines so I can implement it on a DE 10-Lite board. I am looking for someone who has experience using VHDL to implement on Intel DE 10-Lite boards. Deliverables Use the slide switches, sw9 to sw4 ...

    $144 (Avg Bid)
    $144 Avg Bid
    24 bids

    I need to get a part of my project done using VHDL (example: Icarus iVerilog). Please contact me for more information.

    $38 (Avg Bid)
    $38 Avg Bid
    6 bids

    Looking for someone who has a good knowledge in VHDL

    $22 (Avg Bid)
    $22 Avg Bid
    14 bids

    Prob. 1: Our lecture notes have presented all details of designing and implementing a ripple-carry adder. In this assignment, you can reuse the code, but we encourage you to write your own. a) Write a Verilog module that implements a 1-bit half adder. b) Through instantiating the module in a) plus other logic, implement a 1-bit full adder with Verilog. c) Finally, design and implement a 4-bit bina...

    $60 (Avg Bid)
    $60 Avg Bid
    22 bids

    I need a VHDL core for Lattice ECP5 FPGA (or other) that will send strings (just generic strings) over Ethernet with VSC8531-02 using RGMII. The interface would be RGMII on one side and RX/TX FIFOs on the other side.

    $2017 (Avg Bid)
    $2017 Avg Bid
    12 bids
    $50 Avg Bid
    7 bids

    Looking forward to work with you on VHDL code implementation onde1-soc board

    $47 (Avg Bid)
    $47 Avg Bid
    1 bids

    Need VHDL code an exercise on switches, lights and multiplexes along side latches, flip flops and registers.

    $49 (Avg Bid)
    $49 Avg Bid
    1 bids

    This Project is to code exercises on latches, flip-flops and registers along with switches, lights and multiplexers VHDL -- Quartus Prime Lite 18.1 Quartus. Altera De-Soc board hardware implementation

    $67 (Avg Bid)
    $67 Avg Bid
    6 bids

    Simulation of a Radix II multiplier in VHDL and simulation of circuit

    $16 (Avg Bid)
    $16 Avg Bid
    2 bids

    I need someone to do VHDL Lab for me. We have the code and we need to add some more functionality to it where it required in the exercise. Code is in folder ex1srcpy and ex1srcvhdl. You have explanation of what you need to do in the picture.

    $212 (Avg Bid)
    $212 Avg Bid
    13 bids

    I have two tiny tasks : 1 - BCD up counter mod 60 with asynchronous reset and synchronous load. 2 - 8-bit shift register(shifting right?) asynchronous reset, 2 serial input( input right abd input left)and parallel output.

    $20 (Avg Bid)
    $20 Avg Bid
    1 bids

    Hello freelancers. I have some works related to Verilog/VHDL and i am looking for someone who can work with me for a long term. I need someone who can handle simple as well as complex tasks. I will share details of work with selected freelancer.

    $45 (Avg Bid)
    $45 Avg Bid
    23 bids

    I need help in doing record for VHDL code and write the observations from the code. Code is working good but need help writing the observations from it. VHDL and De2-115 board

    $11 (Avg Bid)
    $11 Avg Bid
    1 bids

    I have a matlab test file along with some function files. Need to convert them into VHDL.

    $151 (Avg Bid)
    $151 Avg Bid
    10 bids

    I would need VHDL code for an integer divider; thorough and detailed specifications will be provided after project acceptance. My timeline is quite strict (end is next Monday 13th); moreover I will need to contact the Developer for clarifications and explanation of coding choices (in the following weeks). This is needed because I must understand how the code works (and am a beginner with VHDL).

    $226 (Avg Bid)
    $226 Avg Bid
    11 bids

    i am looking for an expert in VHDL

    $52 (Avg Bid)
    $52 Avg Bid
    9 bids

    build CNN using MAC unit in verilog to trian it using MNIST data set

    $595 (Avg Bid)
    $595 Avg Bid
    7 bids

    I have a lot of works related to different fields of electrical engineering looking for experts in following areas: • Embedded C Programming. • VHDL/Verilog • Microcontroller like Arduino, Raspberry Pi, FPGA, AVR, PIC and STM32. • IDEs like Keil MDK V5, ATmel studio and MPLab XC8. • PLCs / SCADA • PCB Designing-Proteus, Eagle. • Multisim • IOT Technologies...

    $28 (Avg Bid)
    $28 Avg Bid
    22 bids

    We are from an IT project consultant and an online tutoring company also One of our client is looking for Verilog Project Assistance

    $10 / hr (Avg Bid)
    $10 / hr Avg Bid
    3 bids

    FPGA project using VHDL about sequential logic circuits, details will be provided

    $42 (Avg Bid)
    $42 Avg Bid
    1 bids

    Designing a digital system and implementing it using system verilog programming language with a basys.

    $109 (Avg Bid)
    $109 Avg Bid
    8 bids

    Designing a digital system and implementing it using system verilog programming language with a basys.

    $153 (Avg Bid)
    $153 Avg Bid
    3 bids